This invention relates to improvements in a sequence controller which executes sequence processing under the control of a built-in processor and, more particularly, to a sequence controller which, in carrying out sequence processing in accordance with data transferred from another processor, is capable of executing predetermined sequence processing without being affected by the transfer of data.
Conventional sequence controllers, previously constructed of individual items of hardware such as relay circuits, are now being replaced by sequence controllers of the programmable type fashioned around a processor. A sequence controller is operable to control a system by executing prescribed sequence processing in response to directions from a main control unit, the latter also employing a processor.
For example, in a numerical control system for controlling, e.g., a machine tool or a robot, a sequence controller of the type which has an internal numerical control device (referred to as an NC hereinafter) has been developed in which an NC and a sequence controller are each provided with a processor and integrated into one unit. In a system of this kind, the sequence controller has a memory for storing a sequence program for the execution of sequence processing in accordance with M, S and T function instructions transmitted by the NC and is adapted to execute the prescribed sequence processing upon receiving these M, S and T function instructions. The system employs a so-called repetitive operation method wherein the receipt of transferred data and the execution of sequence processing are carried out repeatedly.
If processing could be executed without the sequence controller's own built-in processor and the main processor of the NC being aware of each other in the sequence controller of the above-described type, then it would be possible to lighten the burden on each processor and exploit them more effectively. On the other hand, once the sequence controller has started executing sequence processing, halting such processing is undesirable. For this reason, a system has been considered wherein the completion of sequence processing by the sequence controller (referred to as SC hereinafter) is communicated to the processor on the NC side, whereby data is then transferred from the processor on the NC side to the processor on the SC side so that the SC processor may resume sequence processing. This makes it necessary, however, for the processor on the NC side to monitor the completion of processing by the SC processor, thereby increasing the burden on the NC processor and impeding other processing. Another requirement is synchronization of the transferred data on the SC side.